jmug/rp2040-playground
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2 commits

Author SHA1 Message Date
jmug
f30f36420a Configure XOSC and PLL as ref and sys clocks (12MHz and 150MHz). 
Signed-off-by: jmug <u.g.a.mariano@gmail.com>
 2025-05-18 23:06:30 -07:00
jmug
1e0a36f7b3 Add assembly bare metal blink examble for rp2350. 
Signed-off-by: jmug <u.g.a.mariano@gmail.com>
 2025-05-18 18:32:42 -07:00