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rp2040-playground/bare_metal
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jmug f30f36420a Configure XOSC and PLL as ref and sys clocks (12MHz and 150MHz). 
Signed-off-by: jmug <u.g.a.mariano@gmail.com>
2025-05-18 23:06:30 -07:00
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rp2350/blink Configure XOSC and PLL as ref and sys clocks (12MHz and 150MHz). 2025-05-18 23:06:30 -07:00